1.4.1.5 - Norsk Data hardware - ND-100

Description

• ND-100 CX CPU with 48 bit floating point.
• The ND-100 µprogram is stored in PROMs, arranged as 4K of 64 bits words.
• Using 4 pieces of the SRAM, 1024 x 4 bits x 4 pieces (total 2 KB).
• Print: B   ECO: V
• Print: E   ECO: V
• Print: S   ECO: V
• PCB size 367 x 280 mm, 6 layers
• Release date xx. xxx. xxxx

Chipset

• 01500P
• 01501P
• 01502Q
• 01503Q
• 01504N
• 01705N
• 01506N
• 01507N
• 01508N
• 01509N
• 01510N
• 01511N
• 01512N
• 01513N
• 01514N
• 01515N
• 08500D
• 08501D
• 08502D
• 08503D
• 08504D
• 08505D
• 08506D
• 08507D
• 08508D
• 08509D
• 08510D
• 08511D
• 08512D
• 08513D
• 08514D
• 08515D
• 08600D
• 08601D
• 08602D
• AM2149 - SRAM x 4 pieces
• AM2901 - 4 bits microprocessor slice x 4 pieces
• AM2914 - Interrupt Controller x 2 pieces
• F4702 - Bit-rate generator x 2 pieces
• SN74482 - 4-bit slice control x 3 pieces
• IM6402 - UART

LEDs

• LD4 (green) - Selftest passed
• LD3 (red) - Selftest failed

Straps

• None

Switches

• TH1 (J14) - Console baudrate selector
• TH2 (J12) - ALD selector
• TP1 (A28) - RTC frequency adjustment (factory adjusted)

Connectors

• (A) Console and panel
• (B) Internal CPU/MMS bus
• (C) Standard ND-100 system bus