Description
- The trap system in the ND-500/2 CPU.
- Handles all the trap situations, memory access, conditional operations control.
- Typical position is #16 in the ND-500/2 crate.
- Print: C ECO: Z
- Print: E ECO: Z
- Print: S ECO: Z
- Print: W ECO: Z
- PCB size 405 x 280 mm, 4 layers
- Release date xx. xxx. xxxx
Chipset
LEDs
- LD2 - Trap (yellow) - Trap system on
Straps
Switches
Connectors
- (A) Standard ND-500 bus
- (B) Standard ND-500 bus
- (C) Standard ND-500 bus
- (D) Standard ND-500 bus
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Component side, PCB version C
Solder side, PCB version C
Component side, PCB version E
Solder side, PCB version E
Component side, PCB version S
Solder side, PCB version S
Component side, PCB version W
Solder side, PCB version W
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