1.4.1.7 - Norsk Data hardware - ND-500

Description

• The microcode instruction sequencer and control store parity check in the ND-500/2 CPU.
• Using 8 pieces of SRAM chip, 1024 x 4 bits x 8 pieces (total 4 KB).
• Typical position is #18 in the ND-500/2 crate.
• Print: B   ECO: L
• Print: E   ECO: L
• PCB size 405 x 280 mm, 4 layers
• Release date xx. xxx. xxxx

Chipset

• 30200A
• 30201A
• 30300A
• 30301A
• 30302A
• 30303A
• 30304A
• 30305A
• 30306A
• 30307A
• AM2149 or
  D2149 or
  P2149 or
  SY2149 - SRAM x 8 pieces

LEDs

• LD1 (green) - Trace system armed
• LD2 (red) - Control store parity error

Straps

• None

Switches

• None

Connectors

• Trace port
• TP2 - Test point
• TP1 - Test point
• TP3 - Test point

• (A) Standard ND-500 bus
• (B) Standard ND-500 bus
• (C) Standard ND-500 bus
• (D) Standard ND-500 bus