1.4.1.5 - Norsk Data hardware - ND-100

Description

• 4 MB with dynamic memory for the ND-100 crate.
• Arranged as 22 bits words (16 bits ND-100 word (or 2 bytes) + 6 bits ECC).
• Using 44 pieces of DRAM chip for the memory, 1048576 x 1 bit x 44 pieces (total 5.5 MB).
• Print: A   ECO: D
• Print: B   ECO: D
• PCB size 367 x 280 mm, 4 layers
• Release date xx. xxx. xxxx

Chipset

• TC511000 or
  TMS4C1024 - DRAM x 44 pieces

LEDs

• Upper limit display
• LD6 (yellow) - 6-8 MB active
• LD5 (yellow) - 4-6 MB active
• LD4 (yellow) - 2-4 MB active
• LD3 (yellow) - 0-2 MB active
• LD2 (red) - ERROR - memory error
• LD1 (red) - DISABLE - ECC disabled

Straps

• Memory size

Switches

• TH1 - Lower limit memory address
• TH2 - Lower limit memory address
• TH3 - Lower limit memory address
• SW1 - ECC disable switch

Connectors

• (A) Dummy
• (B) Not present
• (C) Standard ND-100 system bus